Staff AMS Verification Engineer

Renesas Electronics India Pvt Ltd
Bengaluru/Bangalore
Not disclosed
Work from OfficeWork from Office
Full TimeFull Time
Min. 8 yearsMin. 8 years

Job Description

Staff AMS Verification Engineer

Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

 

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

Job Description

Position Overview

We are looking for an experienced Staff AMS Verification Engineer to lead and execute verification of complex Analog/Mixed-Signal (AMS) PMIC (Power Management IC) designs. The role involves developing verification strategies, testbenches, methodologies, and automation for block-level and top-level PMIC verification.

The ideal candidate will have strong expertise in analog/mixed-signal verification, SystemVerilog/UVM, real-number modeling (RNM), SPICE simulations, and power-management circuits, with the ability to work closely with analog design, digital design, modeling, and product engineering teams.

Key Responsibilities

Own the AMS verification strategy for PMIC blocks and full-chip/top-level designs.

Define verification plans, coverage goals, test scenarios, and verification methodologies.

Develop and maintain SystemVerilog/UVM-based verification environments for mixed-signal designs.

Develop and use Real Number Models (RNM), behavioral models, and mixed-signal abstractions for efficient verification.

Perform AMS/DMS simulations for functional and corner-case verification.

Verify PMIC functionality including:

LDOs and voltage regulators, Buck/boost converters, Bandgap references,Oscillators, Charge pumps, Power-on-reset (POR), Brownout detection, Voltage/current monitoring, ADC/DAC interfaces, Power sequencing and state machines ,Protection features(OVP, UVP, OCP, OTP, and short-circuit protection)

Develop verification models for analog blocks and their interaction with digital control logic.

Debug failures across analog, digital, RTL, behavioral models, and testbench environments.

Collaborate closely with analog designers and digital designers, review design specifications and identify verification gaps, corner cases, and potential risks.

Mentor junior and senior verification engineers and provide technical leadership.

Drive improvements in verification methodology, simulation efficiency, automation, and coverage closure.

Contribute to project schedules, technical reviews, sign-off criteria, and verification documentation.

Qualifications

  • Required Qualifications

    Bachelor's or Master's degree in Electrical/Electronics Engineering, Microelectronics, or a related field.

    Typically 8+ years of experience in semiconductor verification, with significant experience in AMS verification.

    Strong understanding of analog and mixed-signal circuit fundamentals.

    Hands-on experience with PMIC architecture and power-management circuits.

    Strong programming/scripting skills in one or more of:

    SystemVerilog

    Python

    Perl

    Tcl

    C/C++

    Strong experience with SystemVerilog/UVM and constrained-random verification.

    Experience with AMS simulation and SPICE-based verification.

    Experience with Real Number Modeling (RNM) and/or behavioral modeling.

    Experience with industry-standard EDA tools such as Cadence, Synopsys, or Siemens EDA simulation and verification environments.

    Strong debugging and problem-solving skills.

    Experience defining verification plans and driving coverage closure and sign-off.

    Preferred Qualifications

    Experience verifying automotive, consumer, mobile, industrial, or server PMICs.

    Knowledge of power-management architectures, including switching regulators and linear regulators.

    Experience with AMS assertions, SVA, and functional safety concepts.

    Knowledge of formal verification or hybrid analog/digital verification methodologies.

    Experience developing reusable AMS verification IP and verification frameworks.

    Experience with silicon bring-up, characterization, or correlation between simulation and silicon measurements.

    Leadership Expectations – Staff Level

    Act as a technical owner for AMS verification methodology and execution.

    Influence architecture and design decisions by identifying verification risks early.

    Establish reusable verification frameworks and best practices across projects.

    Lead complex debug involving interactions between analog and digital domains.

    Mentor engineers and raise the overall technical capability of the verification team.

    Drive technical decisions across cross-functional teams and communicate effectively with senior engineering leadership.

    Proactively identify opportunities to improve verification quality, simulation performance, and project execution.

    Key Skills

    AMS Verification | PMIC | Analog/Mixed-Signal | SystemVerilog | UVM | RNM | SPICE | Verilog-AMS | Python | Assertions | Functional Coverage | Monte Carlo | PVT | Power Management | AMS Simulation | Mixed-Signal Debug | Verification Automation

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Experience Level

Senior Level

Job role

Work location
Work locationBengaluru, KA, India
Department
DepartmentProduction / Manufacturing / Engineering
Role / Category
Role / CategoryManufacturing R&D
Employment type
Employment typeFull Time
Shift
ShiftDay Shift

Job requirements

Experience
ExperienceMin. 8 years

About company

Name
NameRenesas Electronics India Pvt Ltd
Job posted by Renesas Electronics India Pvt Ltd

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